1. Field of the Invention
The invention relates to a non-volatile memory cell structure and non-volatile memory apparatus. Particularly, the invention relates to a non-volatile memory cell structure and non-volatile memory apparatus capable of using lower operating voltage.
2. Description of Related Art
In conventional art, a float gate type non-volatile memory is implemented by a plurality of I/O metal-oxide-semiconductor field-effect transistor (MOSFET). Such as that, an operating voltage of the conventional non-volatile memory can't be reduce to lower than 1.5V. Due to a worst threshold voltage of the I/O MOSFET is around 0.9V, the utility of the conventional non-volatile memory is restricted in low operating voltage (ex. 1.0V) platform.
In some conventional art, a boost scheme is provided for solving the problem mentioned above in the low voltage platform. The boost scheme in the conventional art is used to boost the operating voltage to a higher voltage (ex. 1.2V), and the higher voltage can be provided to the non-volatile memory. Anyway, the conventional non-volatile memory is operated in the higher voltage, and the circuit size and the power consumption are also large.